1. Field of the Invention
Embodiments of the present invention generally relate to the fabrication of integrated circuits and to the fabrication of photomasks useful in the manufacture of integrated circuits.
2. Description of the Related Art
In the manufacture of integrated circuits (IC), or chips, patterns representing different layers of the chip are created by a chip designer. A series of reusable masks, or photomasks, are created from these patterns in order to transfer the design of each chip layer onto a semiconductor substrate during the manufacturing process. Mask pattern generation systems use precision lasers or electron beams to image the design of each layer of the chip onto a respective mask. The masks are then used much like photographic negatives to transfer the circuit patterns for each layer onto a semiconductor substrate. These layers are built up using a sequence of processes and translate into the tiny transistors and electrical circuits that comprise each completed chip. Thus, any defects in the mask may be transferred to the chip, potentially adversely affecting performance. Defects that are severe enough may render the mask completely useless. Typically, a set of 15 to 30 masks is used to construct a chip and can be used repeatedly.
The next generation photomask as further discussed below is formed a glass or a quartz substrate having a multilayer film stack disposed thereon. The multilayer film stack may include an anti-reflective coating layer, an absorber layer, a capping layer, and a reflective multi-material layer. When manufacturing the photomask, a photoresist layer is disposed on the film stack to facilitate transferring features into the film stack during the subsequent patterning processes. During the patterning process, the circuit design is written onto the photomask by exposing portions of the photoresist to extreme ultraviolet light or ultraviolet light, making the exposed portions soluble in a developing solution. The soluble portion of the resist is then removed, allowing the underlying film stack exposed through the remaining photoresist to be etched. The etch process removes the film stack from the photomask at locations where the resist was removed, i.e., the exposed film stack is removed.
With the shrink of critical dimensions (CD), present optical lithography is approaching a technological limit at the 45 nanometer (nm) technology node. Next generation lithography (NGL) is expected to replace the conventional optical lithography method, for example, in the 32 nm technology node and beyond. There are several NGL candidates, such as extreme ultraviolet (EUV) lithography (EUVL), electron projection lithography (EPL), ion projection lithography (IPL), nano-imprint, and X-ray lithography. Among these, EUVL is the most likely successor due to the fact that EUVL has most of the properties of optical lithography, which is a more mature technology as compared with other NGL methods.
Accordingly, the film stack is being developed to have a new film scheme so as to work with the EUV technology to facilitate forming the photomask with desired features disposed thereon. The film stack may include multiple layers with different new materials to be etched to form the desired features. Imprecise etch process and etch endpoint control may result in critical dimension (CD) bias, poor critical dimension (CD) uniformity, undesired cross sectional profile and etch critical dimension (CD) linearity and unwanted defects. It is believed that EUV technology may provide good CD uniformity, less etching bias, desired linearity, less line edge roughness, and high thickness uniformity and less defectivity.
As the new developed film stack described above includes an anti-reflective coating layer, an absorber layer, a capping and a reflective multi-material layer, obtaining precise etching endpoint for each of the layers being etched is becoming more and more difficult. Inaccurate etch endpoint control will often result in etch bias which may result in accurate transfer of the patterns to the film stack with desired critical dimension less than about 5 μm. This results in non-uniformity of the etched features of the photomask and correspondingly diminishes the ability to produce features for devices having small critical dimensions using the photomask. As the critical dimensions of photomask continue to shrink, the importance of accurate etching endpoint control increases. Thus, an accurate etching process endpoint control to the film stack disposed on the photomask for EUV technology is highly desirable.
Therefore, there is an ongoing need for improved etching endpoint process control in photomask fabrication, including improved apparatus and methods for collecting etch rate data and determining process endpoint.